12
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN2867.9
August 24, 2006
ICM7555, ICM7556
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
bbb
C A - B
S
c
Q
L
A
SEATING
BASE
D
PLANE
-D-
-A-
-C-
-B-
α
D
E
S1
b2
b
A
e
M
c1
b1
(c)
(b)
SECTION A-A
BASE
LEAD FINISH
METAL
eA/2
A
M
S
ccc
C A - B
M
D
S
aaa
CA - B
M
D
S
eA
F14.3 MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION A)
14 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A-
0.200
-
5.08
-
b
0.014
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D-
0.785
-
19.94
5
E
0.220
0.310
5.59
7.87
5
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
eA/2
0.150 BSC
3.81 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-7
α
90°
105°
90°
105°
-
aaa
-
0.015
-
0.38
-
bbb
-
0.030
-
0.76
-
ccc
-
0.010
-
0.25
-
M-
0.0015
-
0.038
2, 3
N14
14
8
Rev. 0 4/94
相关PDF资料
ICS180M-03LF IC CLOCK GEN LOW EMI 8-SOIC
ICS180M-51LF IC CLOCK GEN LOW EMI 8-SOIC
ICS180M-52LF IC CLOCK GEN LOW EMI 8-SOIC
ICS180M-53LF IC CLOCK GEN LOW EMI 8-SOIC
ICS181M-53T IC CLOCK GEN LOW EMI 8-SOIC
ICS181MI-01LF IC CLOCK GEN LOW EMI 8-SOIC
ICS2402MLFT IC MULTIPLIER/ZD BUFFER 8-SOIC
ICS270PGILF VCXO CLK TRPL PLL PROGR 20-TSSOP
相关代理商/技术参数
ICM7556MJD/HR 功能描述:计时器和支持产品 RoHS:否 制造商:Micrel 类型:Standard 封装 / 箱体:SOT-23 内部定时器数量:1 电源电压-最大:18 V 电源电压-最小:2.7 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装:Reel
ICM7556MJD+ 制造商:Maxim Integrated Products 功能描述:STD TIMER DUAL 14CDIP - Rail/Tube
ICM7556MPA 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC
ICM7556MPD 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC
ICM7556MTT 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC
ICM755IPA 制造商:INTRSL 功能描述:
ICM7561 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:12/10/8-Bit Low Power Single DAC With Serial Interface and Voltage Output
ICM7561M 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:12/10/8-Bit Low Power Single DAC With Serial Interface and Voltage Output